ASIC, FPGA Design Verification Engineer, Accelerators @ Google - Sunnyvale, CA

Job Overview

2 months ago

ASIC, FPGA Design Verification Engineer, Accelerators

Google - Sunnyvale, CA

Minimum qualifications:

  • 5 years of experience in the verification of designs (e.g., CPUs, networking, or peripheral controllers)
  • Experience with verification methodology (e.g., UVM, OVM, and VMM)
  • Experience with SystemVerilog, SVA, and functional coverage


Preferred qualifications:

  • Master's degree in Electrical Engineering or a related field
  • 7 years of experience in the verification of designs (e.g., CPUs, networking, or peripheral controllers)
  • Experience building comment end UVM-based design verification environments
  • Experience with the full verification lifecycle
  • Experience with a scripting language (e.g., Python or Perl)
  • Knowledge of SystemVerilog, verification IP integration, and high-speed protocols

About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

In this role, you will use design and verification expertise to verify complex accelerator designs, collaborating with design and verification engineers in active projects.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

  • Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM, or verify designs with SVA and industry tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Build reusable design verification infrastructure components for module and environments.
  • Debug tests with design engineers to deliver functionally correct design blocks and complete coverage measures to identify verification gaps, showing progress towards tape-out.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

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