Design Engineer 3 @ M.C. Dean, Inc. - San Francisco, CA

San Jose, CA

Contribute to automated design methodologies for ASIC physical design. PhD in Electrical Engineering, Computer Engineering or relevant fields focused on chip…

Fremont, CA

Must own and drive requirements, design, and implementation of the solution including hardware design, FPGA, FW and appropriate algorithms.

Santa Clara, CA

Power over Ethernet PSE design. You will be working very closely with the hardware board design team for the power solution, design and validation.

Pleasanton, CA

Client is looking for a *Quality Engineer III* in the area of *reading and interpreting mechanical drawings and GD&T*. Job Types: Contract, Full-time.

Pleasanton, CA

Participate in design reviews, Risk Management, Validation & Verification plans and reports during Product Development as required.

San Jose, CA

Hands-on experience in digital design, development leading to production of high-volume IC designs with 15+ years of industry relevant experience.

Sunnyvale, CA

Independently resolves issues and conquer design challenges. Have a decent understanding in CMOS analog / mixed signal design overall.

Santa Clara, CA

You are savvy with automating mundane design tasks and looking forward to bring in efficiency in the ASIC design process. Expected Base Pay Range (USD).

San Jose, CA

Ability to communicate clearly with and guide other parts of the development team: layout designers, test engineers, application engineers.

San Jose, CA

Mixed-signal circuit design fundamentals. High-Speed Analog/Mixed-Signal circuit design and verification flows. Candidate Must Have Thorough Understanding Of.

Livermore, CA

Knowledge of wafer structure design and Mask design. Waveguide design experience using different software programs. Design the Mask to process the wafer.

Santa Clara, CA

Using your coding and protocol expertise, you will contribute to the functional verification of the designs from coming up with block level and system level…

Sunnyvale, CA

5+ years of experience with design verification and test bench development. RTL design, chip bring-up, and post-silicon validation experience.

San Jose, CA

Triaging Regressions, Debugging RTL designs in Verilog and SystemVerilog. This opportunity involves high performance, low power designs on a highly visible…

San Jose, CA

12+ years of experience in SoC/IP/NoC designs. Some background in physical design, knowledge of advanced process technology is a plus.

San Ramon, CA

Ability to apply basic design skills. Works with Designers and Drafters to complete design packages. Applies technical knowledge to designs and ensures projects…

Pleasanton, CA

Design history file / design master record. Design history file / design master record: 8 years (Preferred). Design Control and/or Design Assurance experience.

Sunnyvale, CA

Experience in the physical design of data-path intensive designs. Work with the RTL design team to understand partition architecture and drive physical aspects…

Lafayette, CA

HTML, ASP and Website design experience is a plus. Develop system models for fixed-income and derivatives. Design, develop system package for risk management…

San Jose, CA

Experience in working with production test engineers to develop and validate test plans and design for testability details. Assist with debug and bring-up.

San Jose, CA

Collaborate with specialists from cross-disciplinary design and technology teams. As an ASIC Design Engineer, the individual’s primary responsibility will be…

Sunnyvale, CA

Review engineering drawings and designs for manufacturability. Interface with review team to assure customer satisfaction with design.

San Francisco, CA

Excellent knowledge of digital logic design. Partner with engineers across multiple disciplines on cross functional initiatives.

Oakland, CA

Excellent knowledge of digital logic design. Partner with engineers across multiple disciplines on cross functional initiatives.